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href="/info/industry/special/embedded">嵌入式系統</a> > <a href="/info/articlelist/special/embedded/type/5">設計應用</a> > 深入理解FIFO（包含有FIFO深度的解釋?zhuān)?/p> </div> </div> </div>    <div class="tixy3nr" id="container"> <section> <article> <h1>深入理解FIFO（包含有FIFO深度的解釋?zhuān)?/h1> <div id="8umort3" class="authorTimeSource"> <span>作者：</span> <span>時(shí)間：2017-09-29</span> <span>來(lái)源：網(wǎng)絡(luò )</span> <link rel="stylesheet" type="text/css"/> <span style="float:right; width:130px;margin-right:0px; text-align:right;"> <div id="td7t2gw" class="nav0"> <ul> <li><a href="javascript:void(0);"><img src="http://dyxdggzs.com/event/action/images/icon_add_4.png" width="20" border="0" align="absmiddle" />加入技術(shù)交流群</a> <ul> <li style="text-align:center;"><img src="http://dyxdggzs.com/event/company/images/code_1.jpg" width="130"><br />掃碼加入<br />和技術(shù)大咖面對面交流<br />海量資料庫查詢(xún)</li> </ul> </li> </ul> </div> </span> <span style="float:right; width:30px;margin-right:0px; text-align:right;"><a >收藏</a></span> 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</div> <span id="contentlabels" style="font-size:14px;"><p>　　<a class="contentlabel" href="http://dyxdggzs.com/news/listbylabel/label/FIFO"><em>FIFO</em></a>：</p>本文引用地址：<a href="http://dyxdggzs.com/article/201709/364998.htm">http://dyxdggzs.com/article/201709/364998.htm</a><p>　　一、先入先出隊列(First Input First Output，<a class="contentlabel" href="http://dyxdggzs.com/news/listbylabel/label/FIFO"><em>FIFO</em></a>)這是一種傳統的按序執行方法，先進(jìn)入的指令先完成并引退，跟著(zhù)才執行第二條指令。</p><p><strong>　　1.什么是<a class="contentlabel" href="http://dyxdggzs.com/news/listbylabel/label/FIFO"><em>FIFO</em></a>?</strong></p><p>　　FIFO是英文First In First Out 的縮寫(xiě)，是一種先進(jìn)先出的數據緩存器，他與普通存儲器的區別是沒(méi)有外部讀寫(xiě)地址線(xiàn)，這樣使用起來(lái)非常簡(jiǎn)單，但缺點(diǎn)就是只能順序寫(xiě)入數據，順序的讀出數據，其數據地址由內部讀寫(xiě)指針自動(dòng)加1完成，不能像普通存儲器那樣可以由地址線(xiàn)決定讀取或寫(xiě)入某個(gè)指定的地址。</p><p><strong>　　2.什么情況下用FIFO?</strong></p><p>　　FIFO一般用于不同時(shí)鐘域之間的數據傳輸，比如FIFO的一端時(shí)AD數據采集，另一端時(shí)計算機的PCI總線(xiàn)，假設其AD采集的速率為16位 100K SPS，那么每秒的數據量為100K×16bit=1.6Mbps,而PCI總線(xiàn)的速度為33MHz，總線(xiàn)寬度32bit,其最大傳輸速率為1056Mbps,在兩個(gè)不同的時(shí)鐘域間就可以采用FIFO來(lái)作為數據緩沖。另外對于不同寬度的數據接口也可以用FIFO，例如單片機位8位數據輸出，而DSP可能是16位數據輸入，在單片機與DSP連接時(shí)就可以使用FIFO來(lái)達到數據匹配的目的。</p><p><strong>　　3.FIFO的一些重要參數</strong></p><p>　　FIFO的寬度：也就是英文資料里?？吹降腡HE WIDTH，它只的是FIFO一次讀寫(xiě)操作的數據位，就像MCU有8位和16位，ARM 32位等等，FIFO的寬度在單片成品IC中是固定的，也有可選擇的，如果用FPGA自己實(shí)現一個(gè)FIFO，其數據位，也就是寬度是可以自己定義的。</p><p>　　FIFO的深度：THE DEEPTH，它指的是FIFO可以存儲多少個(gè)N位的數據(如果寬度為N)。如一個(gè)8位的FIFO，若深度為8，它可以存儲8個(gè)8位的數據，深度為12 ，就可以存儲12個(gè)8位的數據，FIFO的深度可大可小，個(gè)人認為FIFO深度的計算并無(wú)一個(gè)固定的公式。在FIFO實(shí)際工作中，其數據的滿(mǎn)/空標志可以控制數據的繼續寫(xiě)入或讀出。在一個(gè)具體的應用中也不可能由一些參數算數精確的所需FIFO深度為多少，這在寫(xiě)速度大于讀速度的理想狀態(tài)下是可行的，但在實(shí)際中用到的FIFO深度往往要大于計算值。一般來(lái)說(shuō)根據電路的具體情況，在兼顧系統性能和FIFO成本的情況下估算一個(gè)大概的寬度和深度就可以了。而對于寫(xiě)速度慢于讀速度的應用，FIFO的深度要根據讀出的數據結構和讀出數據的由那些具體的要求來(lái)確定。</p><p>　　滿(mǎn)標志：FIFO已滿(mǎn)或將要滿(mǎn)時(shí)由FIFO的狀態(tài)電路送出的一個(gè)信號，以阻止FIFO的寫(xiě)操作繼續向FIFO中寫(xiě)數據而造成溢出(overflow)。</p><p>　　空標志：FIFO已空或將要空時(shí)由FIFO的狀態(tài)電路送出的一個(gè)信號，以阻止FIFO的讀操作繼續從FIFO中讀出數據而造成無(wú)效數據的讀出(underflow)。</p><p>　　讀時(shí)鐘：讀操作所遵循的時(shí)鐘，在每個(gè)時(shí)鐘沿來(lái)臨時(shí)讀數據。</p><p>　　寫(xiě)時(shí)鐘：寫(xiě)操作所遵循的時(shí)鐘，在每個(gè)時(shí)鐘沿來(lái)臨時(shí)寫(xiě)數據。</p><p>　　讀指針：指向下一個(gè)讀出地址。讀完后自動(dòng)加1。</p><p>　　寫(xiě)指針：指向下一個(gè)要寫(xiě)入的地址的，寫(xiě)完自動(dòng)加1。</p><p>　　讀寫(xiě)指針其實(shí)就是讀寫(xiě)的地址，只不過(guò)這個(gè)地址不能任意選擇，而是連續的。</p><p><strong>　　4.FIFO的分類(lèi)</strong></p><p>　　根均FIFO工作的時(shí)鐘域，可以將FIFO分為同步FIFO和異步FIFO。同步FIFO是指讀時(shí)鐘和寫(xiě)時(shí)鐘為同一個(gè)時(shí)鐘。在時(shí)鐘沿來(lái)臨時(shí)同時(shí)發(fā)生讀寫(xiě)操作。異步FIFO是指讀寫(xiě)時(shí)鐘不一致，讀寫(xiě)時(shí)鐘是互相獨立的。</p><p><strong>　　5.FIFO設計的難點(diǎn)</strong></p><p>　　FIFO設計的難點(diǎn)在于怎樣判斷FIFO的空/滿(mǎn)狀態(tài)。為了保證數據正確的寫(xiě)入或讀出，而不發(fā)生益處或讀空的狀態(tài)出現，必須保證FIFO在滿(mǎn)的情況下，不能進(jìn)行寫(xiě)操作。在空的狀態(tài)下不能進(jìn)行讀操作。怎樣判斷FIFO的滿(mǎn)/空就成了FIFO設計的核心問(wèn)題。由于同步FIFO幾乎很少用到，這里只描述異步FIFO的空/滿(mǎn)標志產(chǎn)生問(wèn)題。</p><p>　　在用到觸發(fā)器的設計中，不可避免的會(huì )遇到亞穩態(tài)的問(wèn)題(關(guān)于亞穩態(tài)這里不作介紹，可查看相關(guān)資料)。在涉及到觸發(fā)器的電路中，亞穩態(tài)無(wú)法徹底消除，只能想辦法將其發(fā)生的概率將到最低。其中的一個(gè)方法就是使用格雷碼。格雷碼在相鄰的兩個(gè)碼元之間只由一位變換(二進(jìn)制碼在很多情況下是很多碼元在同時(shí)變化)。這就會(huì )避免計數器與時(shí)鐘同步的時(shí)候發(fā)生亞穩態(tài)現象。但是格雷碼有個(gè)缺點(diǎn)就是只能定義2^n的深度，而不能像二進(jìn)制碼那樣隨意的定義FIFO的深度，因為格雷碼必須循環(huán)一個(gè)2^n，否則就不能保證兩個(gè)相鄰碼元之間相差一位的條件，因此也就不是真正的各雷碼了。第二就是使用冗余的觸發(fā)器，假設一個(gè)觸發(fā)器發(fā)生亞穩態(tài)的概率為P，那么兩個(gè)及聯(lián)的觸發(fā)器發(fā)生亞穩態(tài)的概率就為P的平方。但這回導致延時(shí)的增加。亞穩態(tài)的發(fā)生會(huì )使得FIFO出現錯誤，讀/寫(xiě)時(shí)鐘采樣的地址指針會(huì )與真實(shí)的值之間不同，這就導致寫(xiě)入或讀出的地址錯誤。由于考慮延時(shí)的作用，空/滿(mǎn)標志的產(chǎn)生并不一定出現在FIFO真的空/滿(mǎn)時(shí)才出現?？赡蹻IFO還未空/滿(mǎn)時(shí)就出現了空/滿(mǎn)標志。這并沒(méi)有什么不好，只要保證FIFO不出現overflow or underflow 就OK了。</p><p>　　很多關(guān)于FIFO的文章其實(shí)討論的都是空/滿(mǎn)標志的不同算法問(wèn)題。</p><p>　　在Vijay A. Nebhrajani的《異步FIFO結構》一文中，作者提出了兩個(gè)關(guān)于FIFO空/滿(mǎn)標志的算法。</p><p>　　第一個(gè)算法：構造一個(gè)指針寬度為N+1，深度為2^N字節的FIFO(為便方比較將格雷碼指針轉換為二進(jìn)制指針)。當指針的二進(jìn)制碼中最高位不一致而其它N位都相等時(shí)，FIFO為滿(mǎn)(在Clifford E. Cummings的文章中以格雷碼表示是前兩位均不相同，而后兩位LSB相同為滿(mǎn)，這與換成二進(jìn)制表示的MSB不同其他相同為滿(mǎn)是一樣的)。當指針完全相等時(shí)，FIFO為空。這也許不容易看出，舉個(gè)例子說(shuō)明一下：一個(gè)深度為8字節的FIFO怎樣工作(使用已轉換為二進(jìn)制的指針)。FIFO_WIDTH=8，FIFO_DEPTH= 2^N = 8，N = 3，指針寬度為N+1=4。起初rd_ptr_bin和wr_ptr_bin均為“0000”。此時(shí)FIFO中寫(xiě)入8個(gè)字節的數據。wr_ptr_bin =“1000”，rd_ptr_bin=“0000”。當然，這就是滿(mǎn)條件?，F在，假設執行了8次的讀操作，使得rd_ptr_bin =“1000”，這就是空條件。另外的8次寫(xiě)操作將使wr_ptr_bin 等于“0000”，但rd_ptr_bin 仍然等于“1000”，因此FIFO為滿(mǎn)條件。</p><p>　　顯然起始指針無(wú)需為“0000”。假設它為“0100”，并且FIFO為空，那么8個(gè)字節會(huì )使wr_ptr_bin =“1100”，, rd_ptr_bin 仍然為“0100”。這又說(shuō)明FIFO為滿(mǎn)。</p><p>　　在Vijay A. Nebhrajani的這篇《異步FIFO結構》文章中說(shuō)明了怎樣運用格雷碼來(lái)設置空滿(mǎn)的條件，但沒(méi)有說(shuō)清為什么深度為8的FIFO其讀寫(xiě)指針要用3+1位的格雷碼來(lái)實(shí)現，而3+1位的格雷碼可以表示16位的深度，而真實(shí)的FIFO只有8位，這是怎么回事?而這個(gè)問(wèn)題在Clifford E. Cummings的文章中得以解釋。三位格雷碼可表示8位的深度，若在加一位最為MSB，則這一位加其他三位組成的格雷碼并不代表新的地址，也就是說(shuō)格雷碼的0100表示表示7，而1100仍然表示7，只不過(guò)格雷碼在經(jīng)過(guò)一個(gè)以0位MSB的循環(huán)后進(jìn)入一個(gè)以1為MSB的循環(huán)，然后又進(jìn)入一個(gè)以0位MSB的循環(huán)，其他的三位碼仍然是格雷碼，但這就帶來(lái)一個(gè)問(wèn)題，在0100的循環(huán)完成后，進(jìn)入1000，他們之間有兩位發(fā)生了變換，而不是1位，所以增加一位MSB的做法使得該碼在兩處：0100~1000，1100~0000有兩位碼元發(fā)生變化，故該碼以不是真正的格雷碼。增加的MSB是為了實(shí)現空滿(mǎn)標志的計算。Vijay A. Nebhrajani的文章用格雷碼轉二進(jìn)制，再轉格雷碼的情況下提出空滿(mǎn)條件，僅過(guò)兩次轉換，而Clifford E. Cummings的文章中直接在格雷碼條件下得出空滿(mǎn)條件。其實(shí)二者是一樣的，只是實(shí)現方式不同罷了。</p><p>　　第二種算法：Clifford E. Cummings的文章中提到的STYLE #2。它將FIFO地址分成了4部分，每部分分別用高兩位的MSB 00 、01、 11、 10決定FIFO是否為going full 或going empty (即將滿(mǎn)或空)。如果寫(xiě)指針的高兩位MSB小于讀指針的高兩位MSB則FIFO為“幾乎滿(mǎn)”，</p><p>　　若寫(xiě)指針的高兩位MSB大于讀指針的高兩位MSB則FIFO為“幾乎空”。</p><p>　　在Vijay A. Nebhrajani的《異步FIFO結構》第三部分的文章中也提到了一種方法，那就是方向標志與門(mén)限。設定了FIFO容量的75%作為上限，設定FIFO容量的25%為下限。當方向標志超過(guò)門(mén)限便輸出滿(mǎn)/空標志，這與Clifford E. Cummings的文章中提到的STYLE #2可謂是異曲同工。他們都屬于保守的空滿(mǎn)判斷。其實(shí)這時(shí)輸出空滿(mǎn)標志FIFO并不一定真的空/滿(mǎn)。</p><p>　　說(shuō)到此，我們已經(jīng)清楚地看到，FIFO設計最關(guān)鍵的就是產(chǎn)生空/滿(mǎn)標志的算法的不同產(chǎn)生了不同的FIFO。但無(wú)論是精確的空滿(mǎn)還是保守的空滿(mǎn)都是為了保證FIFO工作的可靠。</p><p>　　二、先進(jìn)先出法 (first in,first out ，FIFO)</p><p>　　先進(jìn)先出法是指根據先入庫先發(fā)出的原則，對于發(fā)出的存貨以先入庫存貨的單價(jià)計算發(fā)出存貨成本的方法.采用這種方法的具體做法是：先按存貨的期初余額的單價(jià)計算發(fā)出的存貨的成本，領(lǐng)發(fā)完畢后，再按第一批入庫的存貨的單價(jià)計算，依此從前向后類(lèi)推，計算發(fā)出存貨和結存貨的成本.</p><p>　　先進(jìn)先出法是存貨的計價(jià)方法之一。它是根據先購入的商品先領(lǐng)用或發(fā)出的假定計價(jià)的。用先進(jìn)先出法計算的期末存貨額，比較接近市價(jià)。</p><p>　　先進(jìn)先出法是以先購入的存貨先發(fā)出這樣一種存貨實(shí)物流轉假設為前提，對發(fā)出存貨進(jìn)行計價(jià)的一種方法。采用這種方法，先購入的存貨成本在后購入的存貨成本之前轉出，據此確定發(fā)出存貨和期末存貨的成本</p></span>  <div class="6i2rlot" id="coverDiv" class="article_reg" style="width:100%;overflow:hidden;display:none;z-index:10;position:absolute;left:0;background:#fff;"> <center> <img src="https://webstorage.eepw.com.cn/images/display/reg.jpg" border="0" usemap="#Map" /> <map name="Map" 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