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EEPW首頁(yè) > 嵌入式系統 > 設計應用 > MSP430 怎么開(kāi)關(guān)中斷,開(kāi)關(guān)中斷的代碼|命令

MSP430 怎么開(kāi)關(guān)中斷,開(kāi)關(guān)中斷的代碼|命令

作者: 時(shí)間:2016-11-25 來(lái)源:網(wǎng)絡(luò ) 收藏
_DINT(); 關(guān)總中斷 (可用于保護不希望受到中斷打斷的程序)
例子:
_DINT();
_()NOP; //在保護程序之前與關(guān)中斷之間最少有一步操作。
DINT Disable (general) interrupts  
Syntax DINTOperation 0 → GIEor(0FFF7h .AND. SR → SR / .NOT.src .AND. dst → dst)Emulation BIC #8,SRDescription All interrupts are disabled.The constant 08h is inverted and logically ANDed with the SR. The result is placed intothe SR.Status Bits Status bits are not affected.Mode Bits GIE is reset. OSCOFF and CPUOFF are not affected.Example The general interrupt enable (GIE) bit in the SR is cleared to allow a nondisrupted moveof a 32-bit counter. This ensures that the counter is not modified during the move by anyinterrupt.DINT ; All interrupt events using the GIE bit are disabledNOPMOV COUNTHI,R5 ; Copy counterMOV COUNTLO,R6EINT ; All interrupt events using the GIE bit are enabled
NOTE: Disable interruptIf any code sequence needs to be protected from interruption, DINT should be executed atleast one instruction before the beginning of the uninterruptible sequence, or it should befollowed by a NOP instruction.  
 
_EINT(); 開(kāi)總中斷  
* EINT Enable (general) interruptsSyntax EINTOperation 1 → GIEor(0008h .OR. SR → SR / .src .OR. dst → dst)Emulation BIS #8,SRDescription All interrupts are enabled.The constant #08h and the SR are logically ORed. The result is placed into the SR.Status Bits Status bits are not affected.Mode Bits GIE is set. OSCOFF and CPUOFF are not affected.Example The general interrupt enable (GIE) bit in the SR is set.PUSH.B &P1INBIC.B @SP,&P1IFG ; Reset only accepted flagsEINT ; Preset port 1 interrupt flags stored on stack; other interrupts are allowedBIT #Mask,@SPJEQ MaskOK ; Flags are present identically to mask: jump......MaskOK BIC #Mask,@SP......INCD SP ; Housekeeping: inverse to PUSH instruction; at the start of interrupt subroutine. Corrects; the stack pointer.RETINOTE: Enable interruptThe instruction following the enable interrupt instruction (EINT) is always executed, even if an interrupt service request is pending when the interrupts are enabled.
__bis_SR_register():是將SR里的對應位置1,
__bic_SR_register_on_exit(CPUOFF); 是將SR里的CPUOFF位置0。
__bis_SR_register(CPUOFF + GIE) 的意思是
MSP430頭文件里定義的一個(gè)函數,用于置位SR寄存器中的相應位。 CPUOFF:關(guān)閉CPU,進(jìn)入低功耗模式 GIE:開(kāi)可屏蔽中斷



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